Creating Assertion-Based IP (Hardcover, 2008 ed.)

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This book presents formal testplanning guidelines with examples focused on creating assertion-based verification IP. It demonstrates a systematic process for formal specification and formal testplanning, and also demonstrates effective use of assertions languages beyond the traditional language construct discussions Note that there many books published on assertion languages (such as SystemVerilog assertions and PSL). Yet, none of them discuss the important process of testplanning and using these languages to create verification IP. This is the first book published on this subject.

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Product Description

This book presents formal testplanning guidelines with examples focused on creating assertion-based verification IP. It demonstrates a systematic process for formal specification and formal testplanning, and also demonstrates effective use of assertions languages beyond the traditional language construct discussions Note that there many books published on assertion languages (such as SystemVerilog assertions and PSL). Yet, none of them discuss the important process of testplanning and using these languages to create verification IP. This is the first book published on this subject.

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Product Details

General

Imprint

Springer-Verlag New York

Country of origin

United States

Series

Integrated Circuits and Systems

Release date

November 2007

Availability

Expected to ship within 10 - 15 working days

First published

2008

Authors

,

Dimensions

235 x 155 x 19mm (L x W x T)

Format

Hardcover

Pages

318

Edition

2008 ed.

ISBN-13

978-0-387-36641-8

Barcode

9780387366418

Categories

LSN

0-387-36641-5



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