Intel Xeon Phi Coprocessor High Performance Programming (Paperback)

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Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products.

This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture.

A practical guide to the essentials of the Intel Xeon Phi coprocessorPresents best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming modelIncludes simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational productCovers wide vectors, many cores, many threads and high bandwidth cache/memory architecture


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Product Description

Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products.

This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture.

A practical guide to the essentials of the Intel Xeon Phi coprocessorPresents best practices for portable, high-performance computing and a familiar and proven threaded, scalar-vector programming modelIncludes simple but informative code examples that explain the unique aspects of this new highly parallel and high performance computational productCovers wide vectors, many cores, many threads and high bandwidth cache/memory architecture

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Product Details

General

Imprint

Morgan Kaufmann Publishers In

Country of origin

United States

Release date

March 2013

Availability

Supplier out of stock. If you add this item to your wish list we will let you know when it becomes available.

First published

March 2013

Authors

,

Dimensions

235 x 191 x 19mm (L x W x T)

Format

Paperback

Pages

432

ISBN-13

978-0-12-410414-3

Barcode

9780124104143

Categories

LSN

0-12-410414-2



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